Work place: Department of Electronics and Communication Engineering, Jaypee University of Information Technology, Solan - 173234, India
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Research Interests: Artificial Intelligence, Neural Networks, Network Architecture, Speech Recognition, Speech Synthesis, Data Structures and Algorithms
Biography
Setu P. Singh received the Bachelor degree in Electronics and Communication Engineering from G.L.A.I.T.M., Mathura, India in 2010. He is currently pursuing Master degree in Electronics and Communication Engineering at Jaypee University of Information Technology, Solan, India. His research interest includes VLSI design, Networking, Wireless Communication, Artificial Neural Network and Speech Processing.
By Viranjay M. Srivastava Setu P. Singh
DOI: https://doi.org/10.5815/ijisa.2012.05.03, Pub. Date: 8 May 2012
The scaling of simple gate transistors requires the scaling and transistor elements like source/drain junction became difficult to scale further after a limit due to adverse effect of electrostatic and short-channel performance. The solution of the problem is tri-gate where we can increase the performance without increasing the width and without scaling. In this paper we have described the parameter of tri-gate and taking the high dielectric as substrate.
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