Work place: M.Tech.(VLSI),G-41 Rajput colony, Subhash nagar, Bhilwara-311001, India
E-mail: agal.abhishek@gmail.com
Website:
Research Interests: Algorithm Design, Processor Design, Software Design, Interaction Design
Biography
Abhishek Agal received his Master of Technology in VLSI Design from YMCA University of Science and Technology, Faridabad, Haryana, India and Bachelor of Technology in Electronics and Communication from Institute of Technology and Management, Bhilwara, Rajasthan, India. His research interests are SRAMs, VLSI architectures, HDLs, Embedded System Design, ASIC Design, VLSI Design and Design Methodologies. He has published several research papers in various reputed international/national journals.
By Abhishek Agal Pardeep Bal Krishan
DOI: https://doi.org/10.5815/ijem.2014.03.01, Pub. Date: 18 Dec. 2014
SRAMs are very important part of today's movable devices like laptops and mobile phones. Different SRAM cells of different number of transistors have their own respective advantages and drawbacks. In this work an attempt has been made to reduce the leakage power by adding some transistors. Each SRAM cell provides an efficient way to reduce the leakage power, but disadvantage of each SRAM cell limit the application of them.
In this paper, the study and transient analysis on four different SRAM cells has been carried out and compared with respect to various parameters like power dissipation, delay and area. The simulation is carried out in 180nm CMOS technology using tanner tools. Layout is carried out using microwind.
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