The features of social media sites make them potentially effective as a learning platform for student communication and collaboration in higher education. Moreover it has become apparent that student Facebook users have been repurposing its features to fit their academic requirements. This study aims to determine if Facebook Groups and the Blackboard Learning Management System (LMS) can enhance the learner experience, and if so, in what way. The study made use of a heuristic evaluation with an educationally relevant criteria set [1]. The results, amongst other things, indicate that Facebook Groups are more useful for peer-to-peer communication than Blackboard, probably due to the notification system in Facebook. Analysis indicated that in some instances the strengths and weaknesses of Blackboard and Facebook were complementary and therefore could, arguably, improve the overall student experience.

The difficulty of learning a novel knowledge may not be the same for each learner. Often instructors try to find the easiest way to make a new knowledge understandable by most learners, but few of them give importance to the use of analogies which is the common practice in real life situations. This paper attempts to highlight that learning by analogy allows making the understanding of a novel and complicated knowledge easier. We first propose a model that represents the desired knowledge in an abstract way which allows us to find analogies in different domains. Based on these analogies, learning and assessment strategies can be derived in order to improve the learning outcome. Secondly, the design of a computer system that integrates the analogies, learning and assessment strategies into a digital learning environment is proposed.

This paper presents a new fault-tolerant architecture for floating-point multipliers in which the fault-tolerance capability is achieved at the cost of output precision reduction. In this approach, to achieve the fault-tolerant floating-point multiplier, the hardware cost of the primary design is reduced by output precision reduction. Then, the appropriate redundancy is utilized to provide error detection/correction in such a way that the overall required hardware becomes almost the same as the primary multiplier. The proposed multiplier can tolerate a variety of permanent and transient faults regarding the acceptable reduced precisions in many applications. The implementation results reveal that the 17-bit and 14-bit mantissas are enough to obtain a floating-point multiplier with error detection or error correction, respectively, instead of the 23-bit mantissa in the IEEE-754 standard-based multiplier with a few percent area and power overheads.

Extreme programming is one of the widely used agile models in the software industry. It can handle unclear and changing requirements with the good level of customer satisfaction. However Lack of documentation, poor architectural structure and less focus on design are its major drawbacks that affects its performance. Due to these problems it cannot be used for all kinds of projects. It is considered suitable for small and low risk projects. It also has some controversial practices that cannot be applied in each and every situation like pair programming and on-site customer. To overcome these limitations a modified version of XP called “Simplified Extreme Programming” is proposed in this paper. This model provides solution of these problems without affecting simplicity and agility of extreme programming.

The success of a service oriented computing significantly depends on its reliability and availability. To achieve better reliability and availability, any fault of the service oriented computing has to be properly handled. Low performance on handling the service fault becomes the most proliferated challenge on fault handling approaches. In this paper, a priority based fault handling strategy selection approach for fault recovery of SOA (Service Oriented Architecture) is proposed using priority selector and fault handler. This approach starts from fault detection method and select the first priority level strategies promptly and if fault could not be handled by first highest level then fault handler selects the second level or intermediate priority level for average performance. As a final in the worst case, least level strategies are applied to resolve the faulty situation. Through experiment, the correctness of the proposed algorithm and the efficiency of the approach are proved. This approach results better performance and high rate of fault repairing.

Spell checkers check whether a word is misspelled and provide suggestions to correct it. Detection and correction of spelling errors in Bangla language which is the seventh most spoken native language in the world, is very onerous because of the complex rules of Bangla spelling. There is no systematic literature review on this research topic. In this paper, we present a systematic literature review on checking and correcting spelling errors in Bangla language. We investigate the current methods used for spell checking and find out what challenges are addressed by those methods. We also report the limitations of those methods. Recent relevant studies are selected based on a set of significant criteria. Our results indicate that there are research gaps in this research topic and has a potential for further investigation.

In this paper, a new high-speed and energy efficient 4-to-2 compressor cell was presented using carbon nanotube field effect transistors (CNFETs). CNFET is very suitable for high-frequency and low-voltage applications. In addition, in this paper several conventional and state-of-the-art 4-to-2 compressor cells are surveyed and compared. In order to evaluate the proposed designs, computer simulations are carried out using 32nm-CMOS and 32nm-CNFET technologies. Simulations are conducted using various low voltage power supplies, different temperatures, frequencies and load capacitors. Results of simulation demonstrate predominance of the proposed design in terms of power consumption, delay, and power-delay product (PDP) compared to other 4-to-2 compressor cells and they confirm that the proposed design is the fastest 4-to-2 compressor in various working circumstances.