With the evolution of modern technology wireless sensor nodes are finding a lot of applications in day to day life starting from smart home system to military surveillance. The primary building block of a wireless sensor network is a spatially distributed set of autonomous sensor nodes or motes. In order to design a wireless sensor network it is necessary to understand the structure and working of a sensor node. The sensor nodes can be considered as tiny battery powered computers that consists of a computing subsystem, communication subsystem, sensor subsystem, power subsystem. In this paper we review the features of these subsystems so that it is easy for the application developer to quickly understand and select the type of component for building customized sensor node platform. In this paper we have studied the features of different microprocessors and transceivers properties used in sensor nodes. We also study the classifications of sensors based on applications, the relevant sensor parameters, and different storage devices with their properties. This paper can be a ready reference to beginners interested in this field. One more major problem of wireless sensor network application that should be addressed is the limited lifetime of sensor nodes due to energy constraints. We also review how energy harvesting can increase the lifetime of a wireless sensor network and the possible methods that can be implemented for energy harvesting.

A fast filtering algorithm for color video based on Neighborhood Correlation Filtering is presented. By utilizing a 3 × 3 pixel template, the algorithm can discriminate and filter various patterns of noise spots or blocks. In contrast with many kinds of median filtering algorithm, which may cause image blurring, it has much higher edge preserving ability. Furthermore, this algorithm is able to synchronously reflect image quality via amount, location and density statistics. Filtering of detected pixels is done by NCF algorithm based on a noise adaptive mean absolute difference. The experiments show that the proposed method outperforms other state-of-the-art filters both visually and in terms of objective quality measures such as the mean absolute error (MAE), the peak-signal-to-noise ratio (PSNR) and the normalized color difference (NCD).

Edge detection of an image reduces significantly the amount of data and filters out information that may be regarded as less irrelevant. Edge detection is efficient in medical imaging. Pulse mode neural networks are becoming an attractive solution for function approximation based on frequency modulation. Early pulse mode implementation suffers from some network constraints due to weight range limitations. To provide the best edge detection, the basic algorithm is modified to have pulse mode operations for effective hardware implementation. In this project a new pulse mode network architecture using floating point operations is used in the activation function. By using floating point number system for synapse weight value representation, any function can be approximated by the network. The proposed pulse mode MNN is used to detect the edges in images forming a heterogeneous data base. It shows good learning capability. In addition, four edge detection techniques have been compared. The coding is written in verilog and the final result have been simulated using Xilinx ISE simulator.

This paper presents high-performance Elliptic Curve Cryptography (ECC) architecture over binary field, based on the Montgomery scalar multiplication algorithm. The word-serial finite field arithmetic unit (AU) is proposed with the optimized operation scheduling and bit-parallel modular reduction. With a dedicated squarer, the 163-bit point scalar multiplication with coordinate conversion can be done in 20.9μs by the design of one AU, and can be further improved to 11.1μs by the one of three AUs, both using 0.13μm CMOS technology. The comparison with other ECC designs justifies the effectiveness of the proposed architecture in terms of performance and area-time efficiency.

This paper presents an efficient method for the hand off mechanism in cellular networks using optimization algorithms. The proposed approach integrates a fuzzy logic approach with simulated annealing algorithm to automate the tuning process. The fuzzy controller carries out inference operation at high-speed, whereas the tuning procedure works at a much lower rate. For the implementation described in this paper, a two-input-one-output fuzzy controller is considered. Both the inputs and the output have 8- bit resolution, and up to seven membership functions for each input or output can be defined over the universe of discourse. The fuzzy controller has two levels of pipeline which allows overlapping of the arithmetic as well as inference operations. The SA tuning mechanism adjusts the triangular or singleton membership functions to minimize a cost function. The complete self-tuned fuzzy inference engine is implemented in a Xilinx SPARTAN3 XC3S200 series FPGA device. This paper describes various aspects of the implementation of the self-tuned hand off system.