Work place: RF Quality Assurance, Reliance Jio Infocomm Ltd., Navi Mumbai-400701, India
E-mail: brijesh.i.shah@ril.com
Website:
Research Interests: Computer Networks, Network Architecture, Network Security
Biography
Brijesh Shah has received his M.Tech from IIT, Kanpur in Information System in 2003. He was involved in development for CDMA, WiMAX and LTE Base station till 2014. Presently, he is leading RF Quality Assurance team in Reliance Jio Infocomm Ltd., Mumbai, India. His areas of interest includes RF circuit design and optimisation of LTE Access network. He has two international publications in his name and has submitted five patents.
By Brijesh Shah Niket Thakker Gaurav Dalwadi Nikhil Kothari
DOI: https://doi.org/10.5815/ijwmt.2015.05.02, Pub. Date: 8 Sep. 2015
This paper presents a highly efficient modified output combining 3-stage Doherty Power Amplifier (DPA) design using low power LDMOS transistor for Band 40, TD-LTE Micro eNodeB. In this design, modified output combining technique has been used in the output section which meets the output power requirements of Micro eNodeB which cannot be achieved by conventional 3-stage DPA. The modified DPA design achieves 65.3% power added efficiency (PAE) at 39 dBm average output power with 20 MHz LTE signal using 15 watt LDMOS Transistor. 3-stage modified output combining technique increases the linear output power by 1.1 dB and increases the Gain flatness versus power level. The use of Digital Pre-Distortion (DPD) along with modified 3-stage DPA design achieves the linearity requirements as per the 3GPP specifications. The modified DPA combining technique has provided potential economical solution by using low power LDMOS transistor with an advantage of high efficiency.
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