International Journal of Intelligent Systems and Applications (IJISA)
IJISA Vol. 7, No. 9, 8 Aug. 2015
Cover page and Table of Contents: PDF (size: 455KB)
A Simplified Efficient Technique for the Design of Combinational Logic Circuits
Full Text (PDF, 455KB), PP.42-48
Views: 0 Downloads: 0
Author(s)
Vijayakumari C. K
1,*
Mythili. P
2
Rekha K James
2
Index Terms
2-1multiplexer, Genetic Algorithm, Combinational Circuits, Shannon’s Decomposition
Abstract
A new Genetic Algorithm based approach to the design of combinational logic circuits which uses only 2-1 multiplexers as the basic design unit has been proposed. To realize a function of n variables, conventional design needs 2n-1 units and n levels. Property of a multiplexer tree is that all the units in a level share the same control signal. In this paper, flexibility has been made in selecting the control signals so that units in the same level need not use the same select signal. Control signals can be any of the variables or functions derived from the immediate preceding level. Once a 100 % fit circuit is evolved, check for redundancy of units is made and redundant units are eliminated so that the circuit generated is optimal. It has been observed that the circuits evolved by this approach are superior to the circuits by conventional design in terms of area, power and delay. As power dissipation is an important metric in VLSI design, power loss can be minimized by eliminating unnecessary transitions/switching of idle multiplexers using a specific controller to select appropriate control signals. But in the proposed design power loss can be reduced without any additional device and hence these circuits can be recommended for low power devices.
Cite This Paper
Vijayakumari C. K, Mythili. P, Rekha K James, "A Simplified Efficient Technique for the Design of Combinational Logic Circuits", International Journal of Intelligent Systems and Applications(IJISA), vol.7, no.9, pp.42-48, 2015. DOI:10.5815/ijisa.2015.09.06
Reference
[1]Ahmed T. Soliman and Hazem M. Abbas,” Combinational Circuit Design Using Evolutionary Algorithms”, Electrical and Computer Engineering 2003. IEEE CCECE 2003 Canadian Conference vol.1 pp. 251-254.
[2]F. Miller and Peter Thomson, “Discovering Novel Digital Circuits using Evolutionary Techniques”, IEE Colloquium on Evolvable Systems, London, 1998.
[3]Slowik and Michal Bialko,. “Evolutionary Design of combinational Digital Circuits: State of the Art, Main Problems, and future Trends,” Proceedings of the First International Conference on Information Technology 19-21 May 2008,pp.1-6.
[4]C.K Vijayakumari, P.Mythili, ” A Faster 2 D Technique for the design of combinational digital circuits using Genetic Algorithm”. Proc. of International conference (EPSCICON) 2012, pp. 1-5.
[5]C. Coello and A. Christianses, ”Use of Evolutionary techniques to automate the design of Combinational Circuits”, International Journal of Smart Engineering System Design 2000, pp. 299-314..
[6]David E. Goldberg, Genetic Algorithms in Search, Optimization, and Machine Learning. Addison-Wesley, 1989.
[7]A.H Aguirre and C A Coello Coello, “Using Genetic Programming and multiplexers for the synthesis of Logic Circuits” Proceedings of 2003 NASA/DoD Conference on Evolvable Hardware, 2000, pp. 46-53.
[8]H Aguirre and C A Coello Coello,Bill P Buckles,”Circuit design using Genetic programming-an illustrative study”,10th NASA Symoposium on VLSI Design 2002.
[9]C.Coello, A.Christian and A.Aguirre, ”Automated Design of Combinational Logic circuits using Genetic Algorithms,” Proc. of the International Conf on Artificial Neural Nets and Genetic Algorithms “pp. 3335-3338,1997.
[10]Rekha K. James, Shahana T. K, K. Poulose Jacob,Sreela Sasi, "Delay-Reduced Combinational Logic Synthesis using Multiplexers", Proc .of International Conference on Embedded systems and Applications, pp.105-110.
[11]Nan-Shing Li, Juinn-Dar Huang, and Han-Jung Huang,“Low Power Multiplexer Tree Design Using Dynamic Propagation Path Control”, IJCSNS International Journal of Computer Science and Network Security, VOL.8 No.9, September 2008, pp.838-841.
[12]Cecilia Reis, J. A. Tenreiro Machado, and J. Boaventura Cunha,”Evolutionary design of combinational logic circuits”, Journal of Advanced Computational Intelligence and Intelligent Informatics Vol.8 No.5, 2004, pp. 507-512.
[13]C.K.Vijayakumari, P.Mythil, Rekha.K.James,” An Improved design of Combinational Digital Circuits with Multiplexers using Genetic Algorithm”, IET Proc. of CIIT2013, oct18-19, 2013, pp. 225-229.
[14]C.K Vijayakumari, Lukose Dileep,P. Mythili, Rekha K. James”, An Improved design of Combinational Digital Circuits with Multiplexers using Genetic Algorithm”, International Conference on Microelectronics, Communication and Renewable Energy(ICMiCR-2013), july2013,India. pp. 2-7
[15]Khalid Faraj and AE A Almaini, Optimal polarity of Dual Reed Muller expressions",7th WSEAS International Conference on Microelectronics, Nanoelectronics, Optoelectronics (MINO '08), Istanbul, Turkey, May 27-30, 2008ISBN: 978-960-6766-65-7,ISSN: 1790-5117, pp. 45-52.
[16]A. J. Umbarkar, M S Joshi, P D Sheth, “Dual Population Genetic Algorithm for Solving Constrained Optimization Problems” I.J. Intelligent Systems and Applications, 2015, 02, 34-40 DOI: 10.5815/ijisa.2015.02.05.