IJCNIS Vol. 2, No. 1, 8 Nov. 2010
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Multi-channel video monitoring, time-division multiplexing, field-selected algorithm, ping-pang cache, finite state machine
With the problems of high speed and asynchronism in a multi-channel video, a video monitor system based on FPGA and SRAM is designed and implemented. The system adopts the method of time-division multiplexing to realize the function of four-channel video parallel acquisition. The synchronization between four-channel video is achieved by using the field-selected algorithm. The four-channel video can be outputted to LCD with the technique of ping-pang cache. The LCD display sequences are generated by the finite state machine using Verilog HDL. The system is simple, flexible and with high-quality, and it has a broad application prospect.
Jingbo Xia, Xiaohuan Zhao, Weiwu Guo, "Research on the method of multi-channel video acquisition and display based on FPGA", International Journal of Computer Network and Information Security(IJCNIS), vol.2, no.1, pp.17-23, 2010. DOI:10.5815/ijcnis.2010.01.03
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