B.B.Sagar

Work place: Department of Computer Science and Engineering, BITs, Ranchi(Noida Campus201301, India

E-mail: drbbsagar@gmail.com

Website:

Research Interests: Applied computer science, Computational Science and Engineering, Computational Engineering, Computer systems and computational processes, Theoretical Computer Science, Engineering

Biography

Dr. B. B. Sagar is currently working as an Assistant Professor in Department of CSE, Birla Institute of Technology, Mesra Ranchi and posted at BIT Noida Campus. Received MCA from UPTU and Ph.D. (Computer Science & Engineering) from SHIATS Allahabad in 2004 and 2011 respectively.  Also having 12 years teaching and research experience.  Research interests are in Software Reliability, Network Reliability, Parallel Computing and Distributed Computing.  A Reviewer of various reputed SCI and Scopus International journals and conferences like Elsevier, IEEE, Springer, Taylor & Francis, Inderscience (USA) and published more than 40 research papers in Journal and Conferences of international repute including SCI and Scopus. Chaired many IEEE and other International conference. Also a Professional member of IEEE (USA), IAENG (Hong Kong) and  Fellow of IETE (India) and Life member of Vijnana Bharti (India). Got invited in various International summits and conferences as an invited talk and special guest organized by Govt. of India and others. Recently received “Young Scientist Award” at University of Aalborg, Denmark (Europe) in August, 2016.

Author Articles
Performance Analysis of a System that Identifies the Parallel Modules through Program Dependence Graph

By Shanthi Makka B.B.Sagar

DOI: https://doi.org/10.5815/ijisa.2017.09.05, Pub. Date: 8 Sep. 2017

We have proposed a new approach to identify segments, which can be executed simultaneously, or coextending to achieve high computational speed with optimized utilization of available resources. Our suggested approach is divided into four modules. In first module we have represented a program segment using Abstract Syntax Tree (AST) along with an algorithm for constructing AST and in second module, this AST has been converted into Program Dependence Graph (PDG), the detailed approach has been described in section II, The process of construction of PDG is divided into two steps: First we construct a Control Dependence Graph (CDG, In second step reachability definition algorithm has been used to identify data dependencies between the various modules of a program by constructing Data Dependence Graph (DDG). In third module an algorithm is suggested to identify parallel modules, i.e., the modules that can be executed simultaneously in the section III and in fourth module performance analysis is discussed through our approach along with the computation of time complexity and its comparison with sequential approach is demonstrated in a pictorial form.

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