INFORMATION CHANGE THE WORLD

International Journal of Intelligent Systems and Applications(IJISA)

ISSN: 2074-904X (Print), ISSN: 2074-9058 (Online)

Published By: MECS Press

IJISA Vol.6, No.8, Jul. 2014

Filter Loop Reduction in DT BP Sigma-Delta Modulator Assisted by Noise Coupling Technique

Full Text (PDF, 790KB), PP.1-9


Views:138   Downloads:0

Author(s)

Reza Gholami, Gholamreza Ardeshir, Hossein Miar-Naimi

Index Terms

sigma-delta modulator, bandpass, discrete-time, noise coupling, loop filter

Abstract

In bandpass modulators, a 2N-order loop filter can lead to an N-order noise shaping in the band of interest. This caused a bandpass modulator with more complex structure than a lowpass modulator and increased the power consumption and area of the modulator. In this paper, we proposed a discrete-time bandpass modulator using the noise-coupling technique that only needs to a second- order loop filter to have a second-order noise shaping. To realize a noise coupled bandpass modulator, we need to implement Z-2 delay block in the analog domain, but the proposed modulator uses only Z-1 delay blocks to apply the noise coupling technique. This simplifies the structure of the modulator and reduces the power consumption, area, and nonlinearity of the modulator. The error in the coupling path is considered and the effect of it on the modulator resolution is analyzed. According to the simulation results, the proposed modulator results in SNR = 84.9 dB at 80 MHz sampling frequency, 200 KHz bandwidth and OSR = 200.

Cite This Paper

Reza Gholami, Gholamreza Ardeshir, Hossein Miar-Naimi,"Filter Loop Reduction in DT BP Sigma-Delta Modulator Assisted by Noise Coupling Technique", International Journal of Intelligent Systems and Applications(IJISA), vol.6, no.8, pp.1-9, 2014. DOI: 10.5815/ijisa.2014.08.01

Reference

[1]S. Norsworthy, R. Schreier, and G. Temes, “Delta-Sigma Data Converters: Theory, Design and Simulation”, IEEE Press, 1997, Institute of Electrical and Electronics Engineers, Inc., New York.

[2]R. Schreier and G. C. Temes, “Understanding Delta-Sigma Data Converters”, IEEE Press, 2004, J. Wiley & Sons Interscience, New York.

[3]J. Mitola, “The software radio architecture”, IEEE Communication Magazine, vol. 33, no. 5, pp. 26–38, May 1995.

[4]J. M. de la Rosa, “Sigma-Delta Modulators: Tutorial Overview, Design Guide, and State-of-the-Art Survey”, IEEE Transactions on Circuits And Systems—I: Regular Papers, January 2011, Vol. 58, No. 1, pp. 1 – 21.

[5]Kyehyung Lee, Jeongseok Chae, Mitsuru Aniya, Koichi Hamashita, Kaoru Takasuka, Seiji Takeuchi, and Gabor C. Temes, “A Noise-Coupled Time-Interleaved Delta-Sigma ADC With 4.2 MHz Bandwidth, 98 dB THD, and 79 dB SNDR”, IEEE Journal Of Solid-State Circuits, Vol. 43, No. 12, December 2008, pp. 2601-2611.

[6]Hyungil Chae, Jaehun Jeong, Gabriele Manganaro, Michael Flynn, “A 12mW Low-Power Continuous-Time Bandpass ΔΣ Modulator with 58dB SNDR and 24MHz Bandwidth at 200MHz IF”, IEEE International Solid-State Circuits Conference, San Francisco, CA , February 2012, pp. 148-150.

[7]Ramin Zanbaghi and Terri S. Fiez, “A Novel Low Power Hybrid Loop Filter for Continuous-Time Sigma-Delta Modulators”, IEEE International Symposium on Circuits and Systems, Taipei, May 2009, pp. 3114 – 3117.

[8]Hwi-Ming Wang and Tai-Haur Kuo, “The Design of High-Order Bandpass Sigma-Delta Modulators Using Low-Spread Single-Stage Structure”, IEEE Transactions on Circuits And Systems—II: Express Briefs, April 2004, Vol. 51, No. 4, pp. 202 – 208.

[9]Shu-Chuan Huang and Chia-Te Fu, “A Tunable SC Bandpass Delta-Sigma Modulator for Multi-Standard Applications”, IEEE Asia Pacific Conference on Circuits and Systems, Macao, 2008, pp. 1156 – 1159.

[10]Takaya Yamamoto, Masumi Kasahara, and Tatsuji Matsuura, “A 63 mA 112/94 dB DR IF Bandpass SD Modulator With Direct Feed-Forward Compensation and Double Sampling”, IEEE Journal of Solid-State Circuits, August 2008, Vol. 43, No. 8, pp. 1783 - 1794.

[11]Kyehyung Lee and Gabor C. Temes, “Enhanced split-architecture delta-sigma ADC”, IEEE International Conference on Electronics, Circuits and Systems, Nice, December 2006 , pp. 427 – 430.

[12]K. Lee and M. Bonu and G.C. Temes, “Noise-coupled delta sigma ADCs”, Electronics Letters, November 2006, Vol. 42, No. 24.

[13]K. Lee, G. C. Ternes, and F. Maloberti, “Noise-coupled multi-cell delta sigma ADCs”, IEEE International Symposium on Circuits and Systems, New Orleans, LA, May 2007, pp. 249-252.

[14]Y. Wang and G. C. Ternes, “Delta Sigma ADCs with second-order noise-shaping enhancement”, IEEE International Midwest Symposium on Circuits and Systems, Cancun, August 2009, pp. 345 - 348.

[15]Kyehyung Lee, Jeongseok Chae, Mitsuru Aniya, Kaoru Takasuka, Seiji Takeuchi, and Gabor C. Temes, “A Noise-Coupled Time-Interleaved Delta-Sigma ADC With 4.2 MHz Bandwidth, 98 dB THD, and 79 dB SNDR”, IEEE Journal of Solid-State Circuits, December 2008, Vol. 43, No. 12, pp. 2601 - 2612.

[16]Yan Wang and Gabor C, “Temes, Noise-Coupled Continuous-Time ΔΣ ADCs”, 52nd IEEE International Midwest Symposium on Circuits and Systems, August 2009, pp. 1 - 4.

[17]Y. Wang and G.C, “Temes, Noise-coupled continuous-time delta-sigma ADCs”, Electronics Letters, March 2009, Vol. 45 No. 6.

[18]Y. Jung, S. Lee, C. H. Chen and G.C. Temes, “Double noise coupling ∆Σ analogue-to-digital converter”, Electronics Letters, May 2012, Vol. 48, No. 10.

[19]H. San and H. Kobayashi, “Complex bandpass ΔΣAD modulator with noise-coupled architecture”, IEEE International Midwest Symposium on Circuits and Systems, Knoxville, TN, August 2008, pp. 486-489.

[20]H. San and H. Kobayashi, “Complex bandpass ΔΣAD modulator with noise-coupled image rejection”, IEEE International Midwest Symposium on Circuits and Systems, Cancun, August 2009, pp. 357-360.

[21]J. Silva, U. Moon, J. Steensgaard, and G. C. Temes, “Wideband lowdistortion ∆Σ ADC topology”, Electronics Letters, vol. 37, no. 12, pp.737–738, June 2001.

[22]A. K. ong, “Bandpass Analog-To-Digital Conversion For Wireless Applications”, Ph.D. dissertation, Stanford Electronics Laboratories, Stanford Univ., September 1998.

[23]Teemu Salo, “Bandpass Delta-Sigma Modulators for Radio Receivers”, Ph.D. dissertation, Department of Electrical and Communications Engineering, Helsinki University of Technology, April 2003. 

[24]Franco Maloberti, “Data Converters”, Springer, 2007.

[25]Kyehyung Lee, Matthew R. Miller, and Gabor C. Temes, “An 8.1 mW, 82 dB Delta-Sigma ADC With 1.9 MHz BW and 98 dB THD”, IEEE Journal Of Solid-State Circuits, Vol. 44, No. 8, August 2009.

[26]Piero Malcovati, Simona Brigati, Member, Fabrizio Francesconi, Franco Maloberti, Paolo Cusinato, and Andrea Baschirotto, “Behavioral Modeling of Switched-Capacitor Sigma–Delta Modulators”, IEEE Transactions on Circuits And Systems —I: Fundamental Theory And Applications, Vol. 50, No. 3, March 2003.

[27]Hiva Hedayati And Sayyed Mahdi Kashmiri, “A 13 Bit Band-Pass Double-Sampling Delta-Sigma A/D Converter For 5 MHz IF Signals”, Canadian Conference on Electrical and Computer Engineering, Vol. 1, May 2003, pp. 65 – 68.

[28]X. Liuet, Honglin Xu, Jiajun Zhou, Song Chen, Jiang Yang, “An improved fourth-order band-pass sigma-delta modulator with a novel resonator”, IEEE International Conference on Optoelectronics and Microelectronics, August 2012, pp. 510 - 513.